Error trapping for multiprocessor systems:
A primer
last update:
04/16/2003
An event called a floating-point exception occurs within the CPU's floating-point hardware when the result of a floating-point operation is not representable within the precision limits of the IEEE standard. However, the standard allows this fact to be represented by using a special bit pattern to denote that the value is not representable: it is not a number. This special bit pattern is called a NaN (not a number). Note that NaN is also the result of atttempting to perform floating-point operations on NaN values (NaN + ##.## = NaN). Normally, the CPU's floating-point hardware simply fills in the unrepresentable result with the NaN value and continues. However, a programmer can change this behavior by setting a trap for floating-point exception events. The portion of a program that implements this is called a floating-point exception trap.
Floating-point arithmetic on IBM compute servers conforms to the IEEE standard for binary floating-point arithmetic. See the IEEE Standard for Binary Floating-Point Arithmetic (IEEE Std. 754-1985 reaffirmed 1990) for complete documentation.
This table shows decimal representation of the ranges of floating-point numbers. It is helpful in understanding some of the FPE conditions.
Minimum
(approx.)Maximum
(approx.)Significant
decimal
placesIEEE single-
precision1.17E-0038 3.40E+0038 about 7 IEEE double-
precision2.22E-0308 1.79E+0308 about 15
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